PCIe 6.0 supports 64 GT/s1 or 128 GB/s per direction on an x16 connection.2 A lot of PCI-SIG collateral claims 64 GT/s is 256 GB/s, but they include 128 GB/s in both directions when they make this statement since PCIe has always been full duplex.

It is the first PCIe generation to use PAM4 signaling, forward error correction (FEC), and flit-based encoding. This is significant for two reasons:

  • FLIT mode: It no longer uses 128/130 encoding to frame packets; Gen6 instead relies on the data link layer to handle this.3 FLITs encode FEC and the ACK/NAK packets that used to compete for bandwidth on earlier PCIe generations.
  • PAM4: Doubles the bits per transfer. PCIe Gen 6 calls itself 64 GT/s, but it’s actually 32 GT/s with twice as many bits per transfer.

However, FLITs introduce a different overhead; each 256-bit flit has

  • 236 bytes of payload (TLP)
  • 6 bytes of data link payload (DLP)
  • 8 bytes of CRC
  • 6 bytes of forward error correction (FEC)

This comes out to around 92.2% efficiency of the 128 GB/s per direction, or about 118 GB/s of usable bandwidth per direction for an x16 connection.

Footnotes

  1. PCI Express 6.0 Specification | PCI-SIG (pcisig.com)

  2. PCIe 6.1 - All you need to know about PCI Express Gen6 - Rambus

  3. Designing for Effective Use of PCIe 6.0 Bandwidth | Synopsys IP